SK海力士：计划2026年下半年大幅扩充HBM4产能供给
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Citrini analyst: Apple urgently needs Chinese DRAM and NAND capacity, and may be simultaneously pushing for their inclusion in the supply chain.
According to Mars Finance, on June 27th, Citrini analyst Zephyr cited Chinese mobile phone shipment data, pointing out that foreign brands, including iPhones, saw a 19.2% year-on-year decline in shipments in May, while domestic brands such as Huawei drove a 16.5% increase in total shipments, increasing pressure on Apple in the Chinese market. Zephyr noted that Apple faces not only price issues but also a DRAM supply shortage, and that CXMT products primarily serve the Chinese market, requiring competition with Huawei, which uses CXMT and SwaySure's joint venture memory factory. Zephyr believes that Apple will struggle to maintain its market share in China without adopting CXMT DRAM. He also pointed out that the Kirin 9040 will significantly narrow the SoC performance gap and hinted that Apple is lobbying to introduce 3D NAND flash memory products manufactured by Yangtze Memory Technologies Co., Ltd. (YMTC). Today's news also indicates that Apple is lobbying the Trump administration to allow it to purchase DRAM chips manufactured by the Chinese company YMTC.
Citrini: AMD and Apple are simultaneously pushing forward with flash memory solutions to replace DRAM in AI products.
According to Mars Finance, on June 16th, Citrini Research, the organization behind the "AI Doomsday Report," published an article stating that AMD and Apple are simultaneously advancing solutions to partially replace DRAM with flash memory in their AI products. AMD acquired MEXT to optimize flash memory, bringing its performance close to DRAM, thereby reducing memory costs in AI data centers; Apple, on the other hand, achieves similar optimizations on the device side through its "LLM in a flash" technology. Citrini's latest research report highlights the high memory demands of key-value caching in AI inference, and the "memory tax" pressure from HBM (Hardware Bus) already accounting for 25% of DRAM capacity. Flash memory, costing only 1/55th that of DRAM, can provide a capacity and bandwidth alternative for edge AI through controller optimization, NAND stacking, and cell mode adjustments. This report provides theoretical support for the recent surge in memory stocks, particularly SanDisk.
SanDisk patent reveals 3D in-memory computing architecture: HBM and NAND layered collaboration
Mars Finance reported on June 22 that SanDisk recently disclosed a patent revealing a 3D stacked architecture based on CBA memory chips. This architecture integrates computing chips such as GPUs or AI accelerators directly onto NAND/CMOS logic memory cells, placing them in an interposer layer, surrounded by stacked HBM chips. HBM handles high-bandwidth, low-latency access, while the NAND layer handles high-capacity read/write and storage tasks. This design aims to alleviate the capacity limitations of HBM (approximately 32–64GB per stack). Previously, SanDisk proposed the HBF architecture, which vertically stacks NAND via TSVs, achieving a capacity of up to 4TB, 8–16 times higher than HBM, but still faces challenges in latency and system integration complexity. Compared to DRAM, NAND offers higher capacity and lower cost, but slower access speeds. The new architecture achieves perfect complementarity between the two through 3D layering. (Titanium Garage)
Institutions: Comprehensive upward revision of Q1 DRAM and NAND Flash price growth forecasts for all products.
According to BlockBeats' latest memory industry survey, released on July 6th, demand from AI and data centers will continue to exacerbate the global memory supply-demand imbalance in the first quarter of 2026, further increasing manufacturers' bargaining power. Based on this, TrendForce has comprehensively revised upwards its Q1 price growth forecasts for all DRAM and NAND Flash products. It predicts that the overall Conventional DRAM contract price will increase by 90-95% from the 55-60% increase announced in early January, while the NAND Flash contract price will be revised upwards from 33-38% to 55-60%, with further upward revisions not ruled out. Click the original link below to join the Beating · Lark AI news channel for 24/7 monitoring of global AI hot topics and news.
Samsung's HBM4E yield has exceeded 70%, and its next-generation DRAM process, D1d, aims to receive production readiness approval in November.
According to Mars Finance, on July 1st, following the world's first mass production of HBM4 (6th generation), Samsung Electronics is making progress in the development of HBM4E (7th generation) and next-generation DRAM. Song Jae-hyuk, CTO of Samsung Electronics' DS division and head of its Semiconductor Research Institute, stated at an internal business status briefing on June 30th that the HBM4E reliability testing yield has improved to over 70%. The industry generally considers a yield exceeding 80% to be a stable, "mature yield" stage; considering that HBM4E is still in the reliability testing phase, a yield above 70% is considered an indicator that development is entering a stable range. Samsung Electronics began mass production and shipping of HBM4 in February of this year, and on May 29th, it publicly released detailed technical specifications for its 12-layer HBM4E product, shipping samples to major customers. HBM4 will be used in Nvidia's Vera Rubin AI accelerator, to be launched in the second half of the year, while HBM4E is expected to be used in Nvidia's next-generation AI accelerator, Vera Rubin Ultra, to be launched next year. Samsung's next-generation DRAM process development is also progressing smoothly. Song Jae-hyuk believes that the D1d process technology has a competitive advantage over its rivals and is being developed with the goal of obtaining production readiness approval in November. D1d is Samsung's core DRAM process planned for use starting with the next-generation HBM5 (8th generation). If it progresses as planned, it will have a positive impact on the competitiveness of next-generation DRAM and subsequent HBM5 products. (Fnnews)
Lenovo: Memory price increases are the "new normal," and high DRAM and NAND prices will continue until after 2030.
According to Mars Finance, on June 26th, Lenovo issued a warning at the ISC 2026 conference: DRAM and NAND flash memory prices have entered a structural upward cycle. Even with major manufacturers continuing to expand production, prices are unlikely to fall back to early 2025 levels, and price increases will ultimately become the "new normal" from 2030 onwards. Lenovo showcased price trend charts for DRAM and NAND products in its conference presentation. According to its analysis, although major memory manufacturers such as Samsung, SK Hynix, and Micron are accelerating the construction of new capacity, the expansion effect is insufficient to bridge the supply-demand gap, and prices are expected to remain high for a long time. Meanwhile, Micron has publicly stated that it cannot meet market demand, including from strategic customers, and Samsung and SK Hynix have also issued similar signals, making it difficult to alleviate the supply shortage in the short term. This assessment has a profound impact on the entire consumer electronics industry chain. Lenovo warns that high memory costs will be passed down to PCs, game consoles, smartphones, and all terminal products equipped with memory or solid-state drives, and consumers will face continuous pressure from rising device prices over the next decade. According to data presented by Lenovo at ISC 2026, the current rapid rise in memory prices began in the late third quarter and early fourth quarter of 2025. At that time, DRAM and NAND prices began to break away from their previous cyclical fluctuation range, accelerating upwards to levels that were generally unexpected by the market.